pll_40MHz |

2020.06.08.09:32:14 | Datasheet

Overview

Memory Map

## iopll_0

altera_iopll v18.1

## Parameters
gui_device_family | Arria 10
gui_device_component | 10AX016E3F27E1HG
gui_device_speed_grade | 1
gui_debug_mode | false
gui_include_iossm | false
gui_cal_code_hex_file | iossm.hex
gui_parameter_table_hex_file | seq_params_sim.hex
gui_pll_tclk_mux_en | false
gui_pll_tclk_sel | pll_tclk_m_src
gui_pll_vco_freq_band_0 | pll_freq_clk0_disabled
gui_pll_vco_freq_band_1 | pll_freq_clk1_disabled
gui_pll_freqcal_en | true
gui_pll_freqcal_req_flag | true
gui_cal_converge | false
gui_cal_error | cal_clean
gui_pll_cal_done | false
gui_pll_type | S10_Simple
gui_pll_m_cnt_in_src | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src0 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src1 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src2 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src3 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src4 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src5 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src6 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src7 | c_m_cnt_in_src_ph_mux_clk
gui_c_cnt_in_src8 | c_m_cnt_in_src_ph_mux_clk
system_info_device_family | ARRIA10
system_info_device_component | 10AX016E3F27E1HG
system_info_device_speed_grade | 1
system_part_trait_speed_grade | 1
gui_usr_device_speed_grade | 1
gui_en_reconf | false
gui_en_dps_ports | false
gui_pll_mode | Integer-N PLL
gui_reference_clock_frequency | 40.0
gui_fractional_cout | 32
gui_dsm_out_sel | 1st_order
gui_use_locked | true
gui_en_adv_params | false
gui_pll_bandwidth_preset | Low
gui_lock_setting | Low Lock Time
gui_pll_auto_reset | false
gui_en_lvds_ports | Disabled
gui_operation_mode | direct
gui_feedback_clock | Global Clock
gui_clock_to_compensate | 0
gui_use_NDFB_modes | false
gui_refclk_switch | false
gui_refclk1_frequency | 100.0
gui_en_phout_ports | false
gui_phout_division | 1
gui_en_extclkout_ports | false
gui_number_of_clocks | 3
gui_multiply_factor | 6
gui_divide_factor_n | 1
gui_frac_multiply_factor | 1
gui_fix_vco_frequency | false
gui_fixed_vco_frequency | 600.0
gui_vco_frequency | 600.0
gui_enable_output_counter_cascading | false
gui_mif_gen_options | Generate New MIF File
gui_new_mif_file_path | ~/pll.mif
gui_existing_mif_file_path | ~/pll.mif
gui_mif_config_name | unnamed
gui_active_clk | false
gui_clk_bad | false
gui_switchover_mode | Automatic Switchover
gui_switchover_delay | 0
gui_enable_cascade_out | false
gui_cascade_outclk_index | 0
gui_enable_cascade_in | false
gui_pll_cascading_mode | adjpllin
gui_enable_mif_dps | false
gui_dps_cntr | C0
gui_dps_num | 1
gui_dps_dir | Positive
gui_extclkout_0_source | C0
gui_extclkout_1_source | C0
gui_clock_name_global | false
gui_clock_name_string0 | outclk0
gui_clock_name_string1 | outclk1
gui_clock_name_string2 | outclk2
gui_clock_name_string3 | outclk3
gui_clock_name_string4 | outclk4
gui_clock_name_string5 | outclk5
gui_clock_name_string6 | outclk6
gui_clock_name_string7 | outclk7
gui_clock_name_string8 | outclk8
gui_clock_name_string9 | outclk9
gui_clock_name_string10 | outclk10
gui_clock_name_string11 | outclk11
gui_clock_name_string12 | outclk12
gui_clock_name_string13 | outclk13
gui_clock_name_string14 | outclk14
gui_clock_name_string15 | outclk15
gui_clock_name_string16 | outclk16
gui_clock_name_string17 | outclk17
gui_divide_factor_c0 | 6
gui_divide_factor_c1 | 6
gui_divide_factor_c2 | 6
gui_divide_factor_c3 | 6
gui_divide_factor_c4 | 6
gui_divide_factor_c5 | 6
gui_divide_factor_c6 | 6
gui_divide_factor_c7 | 6
gui_divide_factor_c8 | 6
gui_divide_factor_c9 | 6
gui_divide_factor_c10 | 6
gui_divide_factor_c11 | 6
gui_divide_factor_c12 | 6
gui_divide_factor_c13 | 6
gui_divide_factor_c14 | 6
gui_divide_factor_c15 | 6
gui_divide_factor_c16 | 6
gui_divide_factor_c17 | 6
gui_cascade_counter0 | false
gui_cascade_counter1 | false
gui_cascade_counter2 | false
gui_cascade_counter3 | false
gui_cascade_counter4 | false
gui_cascade_counter5 | false
gui_cascade_counter6 | false
gui_cascade_counter7 | false
gui_cascade_counter8 | false
gui_cascade_counter9 | false
gui_cascade_counter10 | false
gui_cascade_counter11 | false
gui_cascade_counter12 | false
gui_cascade_counter13 | false
gui_cascade_counter14 | false
gui_cascade_counter15 | false
gui_cascade_counter16 | false
gui_cascade_counter17 | false
gui_output_clock_frequency0 | 5.0
gui_output_clock_frequency1 | 40.0
gui_output_clock_frequency2 | 320.0
gui_output_clock_frequency3 | 100.0
gui_output_clock_frequency4 | 100.0
gui_output_clock_frequency5 | 100.0
gui_output_clock_frequency6 | 100.0
gui_output_clock_frequency7 | 100.0
gui_output_clock_frequency8 | 100.0
gui_output_clock_frequency9 | 100.0
gui_output_clock_frequency10 | 100.0
gui_output_clock_frequency11 | 100.0
gui_output_clock_frequency12 | 100.0
gui_output_clock_frequency13 | 100.0
gui_output_clock_frequency14 | 100.0
gui_output_clock_frequency15 | 100.0
gui_output_clock_frequency16 | 100.0
gui_output_clock_frequency17 | 100.0
gui_actual_output_clock_frequency0 | 5.0
gui_actual_output_clock_frequency1 | 40.0
gui_actual_output_clock_frequency2 | 320.0
gui_actual_output_clock_frequency3 | 100.0
gui_actual_output_clock_frequency4 | 100.0
gui_actual_output_clock_frequency5 | 100.0
gui_actual_output_clock_frequency6 | 100.0
gui_actual_output_clock_frequency7 | 100.0
gui_actual_output_clock_frequency8 | 100.0
gui_actual_output_clock_frequency9 | 100.0
gui_actual_output_clock_frequency10 | 100.0
gui_actual_output_clock_frequency11 | 100.0
gui_actual_output_clock_frequency12 | 100.0
gui_actual_output_clock_frequency13 | 100.0
gui_actual_output_clock_frequency14 | 100.0
gui_actual_output_clock_frequency15 | 100.0
gui_actual_output_clock_frequency16 | 100.0
gui_actual_output_clock_frequency17 | 100.0
gui_actual_output_clock_frequency_range0 | 4.994426,4.994571,4.994709,5.0,5.005258,5.005394
gui_actual_output_clock_frequency_range1 | 39.736842,39.743590,39.75,40.0,40.256410,40.263158
gui_actual_output_clock_frequency_range2 | 306.666667,310.0,312.0,320.0,330.0,333.333333
gui_actual_output_clock_frequency_range3 | 100.0
gui_actual_output_clock_frequency_range4 | 100.0
gui_actual_output_clock_frequency_range5 | 100.0
gui_actual_output_clock_frequency_range6 | 100.0
gui_actual_output_clock_frequency_range7 | 100.0
gui_actual_output_clock_frequency_range8 | 100.0
gui_actual_output_clock_frequency_range9 | 100.0
gui_actual_output_clock_frequency_range10 | 100.0
gui_actual_output_clock_frequency_range11 | 100.0
gui_actual_output_clock_frequency_range12 | 100.0
gui_actual_output_clock_frequency_range13 | 100.0
gui_actual_output_clock_frequency_range14 | 100.0
gui_actual_output_clock_frequency_range15 | 100.0
gui_actual_output_clock_frequency_range16 | 100.0
gui_actual_output_clock_frequency_range17 | 100.0
gui_ps_units0 | ps
gui_ps_units1 | ps
gui_ps_units2 | ps
gui_ps_units3 | ps
gui_ps_units4 | ps
gui_ps_units5 | ps
gui_ps_units6 | ps
gui_ps_units7 | ps
gui_ps_units8 | ps
gui_ps_units9 | ps
gui_ps_units10 | ps
gui_ps_units11 | ps
gui_ps_units12 | ps
gui_ps_units13 | ps
gui_ps_units14 | ps
gui_ps_units15 | ps
gui_ps_units16 | ps
gui_ps_units17 | ps
gui_phase_shift0 | 0.0
gui_phase_shift1 | 0.0
gui_phase_shift2 | 0.0
gui_phase_shift3 | 0.0
gui_phase_shift4 | 0.0
gui_phase_shift5 | 0.0
gui_phase_shift6 | 0.0
gui_phase_shift7 | 0.0
gui_phase_shift8 | 0.0
gui_phase_shift9 | 0.0
gui_phase_shift10 | 0.0
gui_phase_shift11 | 0.0
gui_phase_shift12 | 0.0
gui_phase_shift13 | 0.0
gui_phase_shift14 | 0.0
gui_phase_shift15 | 0.0
gui_phase_shift16 | 0.0
gui_phase_shift17 | 0.0
gui_phase_shift_deg0 | 0.0
gui_phase_shift_deg1 | 0.0
gui_phase_shift_deg2 | 0.0
gui_phase_shift_deg3 | 0.0
gui_phase_shift_deg4 | 0.0
gui_phase_shift_deg5 | 0.0
gui_phase_shift_deg6 | 0.0
gui_phase_shift_deg7 | 0.0
gui_phase_shift_deg8 | 0.0
gui_phase_shift_deg9 | 0.0
gui_phase_shift_deg10 | 0.0
gui_phase_shift_deg11 | 0.0
gui_phase_shift_deg12 | 0.0
gui_phase_shift_deg13 | 0.0
gui_phase_shift_deg14 | 0.0
gui_phase_shift_deg15 | 0.0
gui_phase_shift_deg16 | 0.0
gui_phase_shift_deg17 | 0.0
gui_actual_phase_shift0 | 0.0
gui_actual_phase_shift1 | 0.0
gui_actual_phase_shift2 | 0.0
gui_actual_phase_shift3 | 0.0
gui_actual_phase_shift4 | 0.0
gui_actual_phase_shift5 | 0.0
gui_actual_phase_shift6 | 0.0
gui_actual_phase_shift7 | 0.0
gui_actual_phase_shift8 | 0.0
gui_actual_phase_shift9 | 0.0
gui_actual_phase_shift10 | 0.0
gui_actual_phase_shift11 | 0.0
gui_actual_phase_shift12 | 0.0
gui_actual_phase_shift13 | 0.0
gui_actual_phase_shift14 | 0.0
gui_actual_phase_shift15 | 0.0
gui_actual_phase_shift16 | 0.0
gui_actual_phase_shift17 | 0.0
gui_actual_phase_shift_range0 | 0.0,78.1,97.7,130.2,156.3,195.3
gui_actual_phase_shift_range1 | 0.0,78.1,97.7,130.2,156.3,195.3
gui_actual_phase_shift_range2 | 0.0,78.1,97.7,130.2,156.3,195.3
gui_actual_phase_shift_range3 | 0.0
gui_actual_phase_shift_range4 | 0.0
gui_actual_phase_shift_range5 | 0.0
gui_actual_phase_shift_range6 | 0.0
gui_actual_phase_shift_range7 | 0.0
gui_actual_phase_shift_range8 | 0.0
gui_actual_phase_shift_range9 | 0.0
gui_actual_phase_shift_range10 | 0.0
gui_actual_phase_shift_range11 | 0.0
gui_actual_phase_shift_range12 | 0.0
gui_actual_phase_shift_range13 | 0.0
gui_actual_phase_shift_range14 | 0.0
gui_actual_phase_shift_range15 | 0.0
gui_actual_phase_shift_range16 | 0.0
gui_actual_phase_shift_range17 | 0.0
gui_actual_phase_shift_deg0 | 0.0
gui_actual_phase_shift_deg1 | 0.0
gui_actual_phase_shift_deg2 | 0.0
gui_actual_phase_shift_deg3 | 0.0
gui_actual_phase_shift_deg4 | 0.0
gui_actual_phase_shift_deg5 | 0.0
gui_actual_phase_shift_deg6 | 0.0
gui_actual_phase_shift_deg7 | 0.0
gui_actual_phase_shift_deg8 | 0.0
gui_actual_phase_shift_deg9 | 0.0
gui_actual_phase_shift_deg10 | 0.0
gui_actual_phase_shift_deg11 | 0.0
gui_actual_phase_shift_deg12 | 0.0
gui_actual_phase_shift_deg13 | 0.0
gui_actual_phase_shift_deg14 | 0.0
gui_actual_phase_shift_deg15 | 0.0
gui_actual_phase_shift_deg16 | 0.0
gui_actual_phase_shift_deg17 | 0.0
gui_actual_phase_shift_deg_range0 | 0.0,0.1,0.2,0.2,0.3,0.4
gui_actual_phase_shift_deg_range1 | 0.0,1.1,1.4,1.9,2.3,2.8
gui_actual_phase_shift_deg_range2 | 0.0,9.0,11.3,15.0,18.0,22.5
gui_actual_phase_shift_deg_range3 | 0.0
gui_actual_phase_shift_deg_range4 | 0.0
gui_actual_phase_shift_deg_range5 | 0.0
gui_actual_phase_shift_deg_range6 | 0.0
gui_actual_phase_shift_deg_range7 | 0.0
gui_actual_phase_shift_deg_range8 | 0.0
gui_actual_phase_shift_deg_range9 | 0.0
gui_actual_phase_shift_deg_range10 | 0.0
gui_actual_phase_shift_deg_range11 | 0.0
gui_actual_phase_shift_deg_range12 | 0.0
gui_actual_phase_shift_deg_range13 | 0.0
gui_actual_phase_shift_deg_range14 | 0.0
gui_actual_phase_shift_deg_range15 | 0.0
gui_actual_phase_shift_deg_range16 | 0.0
gui_actual_phase_shift_deg_range17 | 0.0
gui_duty_cycle0 | 50.0
gui_duty_cycle1 | 50.0
gui_duty_cycle2 | 50.0
gui_duty_cycle3 | 50.0
gui_duty_cycle4 | 50.0
gui_duty_cycle5 | 50.0
gui_duty_cycle6 | 50.0
gui_duty_cycle7 | 50.0
gui_duty_cycle8 | 50.0
gui_duty_cycle9 | 50.0
gui_duty_cycle10 | 50.0
gui_duty_cycle11 | 50.0
gui_duty_cycle12 | 50.0
gui_duty_cycle13 | 50.0
gui_duty_cycle14 | 50.0
gui_duty_cycle15 | 50.0
gui_duty_cycle16 | 50.0
gui_duty_cycle17 | 50.0
gui_actual_duty_cycle0 | 50.0
gui_actual_duty_cycle1 | 50.0
gui_actual_duty_cycle2 | 50.0
gui_actual_duty_cycle3 | 50.0
gui_actual_duty_cycle4 | 50.0
gui_actual_duty_cycle5 | 50.0
gui_actual_duty_cycle6 | 50.0
gui_actual_duty_cycle7 | 50.0
gui_actual_duty_cycle8 | 50.0
gui_actual_duty_cycle9 | 50.0
gui_actual_duty_cycle10 | 50.0
gui_actual_duty_cycle11 | 50.0
gui_actual_duty_cycle12 | 50.0
gui_actual_duty_cycle13 | 50.0
gui_actual_duty_cycle14 | 50.0
gui_actual_duty_cycle15 | 50.0
gui_actual_duty_cycle16 | 50.0
gui_actual_duty_cycle17 | 50.0
gui_actual_duty_cycle_range0 | 49.53,49.69,49.80,50.0,50.16,50.26
gui_actual_duty_cycle_range1 | 47.92,48.44,48.75,50.0,51.25,51.56
gui_actual_duty_cycle_range2 | 33.33,37.5,40.0,50.0,60.0,62.5
gui_actual_duty_cycle_range3 | 50.0
gui_actual_duty_cycle_range4 | 50.0
gui_actual_duty_cycle_range5 | 50.0
gui_actual_duty_cycle_range6 | 50.0
gui_actual_duty_cycle_range7 | 50.0
gui_actual_duty_cycle_range8 | 50.0
gui_actual_duty_cycle_range9 | 50.0
gui_actual_duty_cycle_range10 | 50.0
gui_actual_duty_cycle_range11 | 50.0
gui_actual_duty_cycle_range12 | 50.0
gui_actual_duty_cycle_range13 | 50.0
gui_actual_duty_cycle_range14 | 50.0
gui_actual_duty_cycle_range15 | 50.0
gui_actual_duty_cycle_range16 | 50.0
gui_actual_duty_cycle_range17 | 50.0
parameterTable_names | M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control
parameterTable_values | 16,1,640.0 MHz,128,16,2,1,1,1,1,1,1,false,8,8,false,false,256,256,false,true,64,8,1,256,256,256,256,256,256,64,8,1,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting3
mifTable_names | The MIF file specified does not yet exist
mifTable_values |
pll_m_cnt_basic | 1
pll_m_cnt | 1
m_cnt_hi_div | 8
m_cnt_lo_div | 8
n_cnt_hi_div | 256
n_cnt_lo_div | 256
m_cnt_bypass_en | false
n_cnt_bypass_en | true
m_cnt_odd_div_duty_en | false
n_cnt_odd_div_duty_en | false
pll_vco_div | 1
pll_cp_current | pll_cp_setting10
pll_bwctrl | pll_bw_res_setting3
pll_fractional_division | 1
fractional_vco_multiplier | false
reference_clock_frequency | 40.0 MHz
pll_fractional_cout | 1
pll_dsm_out_sel | 1st_order
operation_mode | direct
number_of_clocks | 3
pll_vcoph_div | 1
pll_type | Arria 10
pll_subtype | General
pll_output_clk_frequency | 640.0 MHz
mimic_fbclk_type | gclk
pll_bw_sel | Low
pll_slf_rst | false
pll_fbclk_mux_1 | pll_fbclk_mux_1_glb
pll_fbclk_mux_2 | pll_fbclk_mux_2_m_cnt
pll_m_cnt_in_src | c_m_cnt_in_src_ph_mux_clk
pll_clkin_0_src | clk_0
refclk1_frequency | 100.0 MHz
pll_clk_loss_sw_en | false
pll_manu_clk_sw_en | false
pll_auto_clk_sw_en | false
pll_clkin_1_src | clk_0
pll_clk_sw_dly | 0
pll_extclk_0_cnt_src | pll_extclk_cnt_src_vss
pll_extclk_1_cnt_src | pll_extclk_cnt_src_vss
pll_lock_fltr_cfg | 100
pll_unlock_fltr_cfg | 2
lock_mode | low_lock_time
clock_to_compensate | 0
clock_name_global | false
c_cnt_hi_div0 | 64
c_cnt_hi_div1 | 8
c_cnt_hi_div2 | 1
c_cnt_hi_div3 | 256
c_cnt_hi_div4 | 256
c_cnt_hi_div5 | 256
c_cnt_hi_div6 | 256
c_cnt_hi_div7 | 256
c_cnt_hi_div8 | 256
c_cnt_hi_div9 | 1
c_cnt_hi_div10 | 1
c_cnt_hi_div11 | 1
c_cnt_hi_div12 | 1
c_cnt_hi_div13 | 1
c_cnt_hi_div14 | 1
c_cnt_hi_div15 | 1
c_cnt_hi_div16 | 1
c_cnt_hi_div17 | 1
c_cnt_lo_div0 | 64
c_cnt_lo_div1 | 8
c_cnt_lo_div2 | 1
c_cnt_lo_div3 | 256
c_cnt_lo_div4 | 256
c_cnt_lo_div5 | 256
c_cnt_lo_div6 | 256
c_cnt_lo_div7 | 256
c_cnt_lo_div8 | 256
c_cnt_lo_div9 | 1
c_cnt_lo_div10 | 1
c_cnt_lo_div11 | 1
c_cnt_lo_div12 | 1
c_cnt_lo_div13 | 1
c_cnt_lo_div14 | 1
c_cnt_lo_div15 | 1
c_cnt_lo_div16 | 1
c_cnt_lo_div17 | 1
c_cnt_prst0 | 1
c_cnt_prst1 | 1
c_cnt_prst2 | 1
c_cnt_prst3 | 1
c_cnt_prst4 | 1
c_cnt_prst5 | 1
c_cnt_prst6 | 1
c_cnt_prst7 | 1
c_cnt_prst8 | 1
c_cnt_prst9 | 1
c_cnt_prst10 | 1
c_cnt_prst11 | 1
c_cnt_prst12 | 1
c_cnt_prst13 | 1
c_cnt_prst14 | 1
c_cnt_prst15 | 1
c_cnt_prst16 | 1
c_cnt_prst17 | 1
c_cnt_ph_mux_prst0 | 0
c_cnt_ph_mux_prst1 | 0
c_cnt_ph_mux_prst2 | 0
c_cnt_ph_mux_prst3 | 0
c_cnt_ph_mux_prst4 | 0
c_cnt_ph_mux_prst5 | 0
c_cnt_ph_mux_prst6 | 0
c_cnt_ph_mux_prst7 | 0
c_cnt_ph_mux_prst8 | 0
c_cnt_ph_mux_prst9 | 0
c_cnt_ph_mux_prst10 | 0
c_cnt_ph_mux_prst11 | 0
c_cnt_ph_mux_prst12 | 0
c_cnt_ph_mux_prst13 | 0
c_cnt_ph_mux_prst14 | 0
c_cnt_ph_mux_prst15 | 0
c_cnt_ph_mux_prst16 | 0
c_cnt_ph_mux_prst17 | 0
c_cnt_in_src0 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src1 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src2 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src3 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src4 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src5 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src6 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src7 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src8 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src9 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src10 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src11 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src12 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src13 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src14 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src15 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src16 | c_m_cnt_in_src_ph_mux_clk
c_cnt_in_src17 | c_m_cnt_in_src_ph_mux_clk
c_cnt_bypass_en0 | false
c_cnt_bypass_en1 | false
c_cnt_bypass_en2 | false
c_cnt_bypass_en3 | true
c_cnt_bypass_en4 | true
c_cnt_bypass_en5 | true
c_cnt_bypass_en6 | true
c_cnt_bypass_en7 | true
c_cnt_bypass_en8 | true
c_cnt_bypass_en9 | true
c_cnt_bypass_en10 | true
c_cnt_bypass_en11 | true
c_cnt_bypass_en12 | true
c_cnt_bypass_en13 | true
c_cnt_bypass_en14 | true
c_cnt_bypass_en15 | true
c_cnt_bypass_en16 | true
c_cnt_bypass_en17 | true
c_cnt_odd_div_duty_en0 | false
c_cnt_odd_div_duty_en1 | false
c_cnt_odd_div_duty_en2 | false
c_cnt_odd_div_duty_en3 | false
c_cnt_odd_div_duty_en4 | false
c_cnt_odd_div_duty_en5 | false
c_cnt_odd_div_duty_en6 | false
c_cnt_odd_div_duty_en7 | false
c_cnt_odd_div_duty_en8 | false
c_cnt_odd_div_duty_en9 | false
c_cnt_odd_div_duty_en10 | false
c_cnt_odd_div_duty_en11 | false
c_cnt_odd_div_duty_en12 | false
c_cnt_odd_div_duty_en13 | false
c_cnt_odd_div_duty_en14 | false
c_cnt_odd_div_duty_en15 | false
c_cnt_odd_div_duty_en16 | false
c_cnt_odd_div_duty_en17 | false
output_clock_frequency0 | 5.000000 MHz
output_clock_frequency1 | 40.000000 MHz
output_clock_frequency2 | 320.000000 MHz
output_clock_frequency3 | 0 ps
output_clock_frequency4 | 0 ps
output_clock_frequency5 | 0 ps
output_clock_frequency6 | 0 ps
output_clock_frequency7 | 0 ps
output_clock_frequency8 | 0 ps
output_clock_frequency9 | 0 MHz
output_clock_frequency10 | 0 MHz
output_clock_frequency11 | 0 MHz
output_clock_frequency12 | 0 MHz
output_clock_frequency13 | 0 MHz
output_clock_frequency14 | 0 MHz
output_clock_frequency15 | 0 MHz
output_clock_frequency16 | 0 MHz
output_clock_frequency17 | 0 MHz
phase_shift0 | 0 ps
phase_shift1 | 0 ps
phase_shift2 | 0 ps
phase_shift3 | 0 ps
phase_shift4 | 0 ps
phase_shift5 | 0 ps
phase_shift6 | 0 ps
phase_shift7 | 0 ps
phase_shift8 | 0 ps
phase_shift9 | 0 ps
phase_shift10 | 0 ps
phase_shift11 | 0 ps
phase_shift12 | 0 ps
phase_shift13 | 0 ps
phase_shift14 | 0 ps
phase_shift15 | 0 ps
phase_shift16 | 0 ps
phase_shift17 | 0 ps
duty_cycle0 | 50
duty_cycle1 | 50
duty_cycle2 | 50
duty_cycle3 | 50
duty_cycle4 | 50
duty_cycle5 | 50
duty_cycle6 | 50
duty_cycle7 | 50
duty_cycle8 | 50
duty_cycle9 | 50
duty_cycle10 | 50
duty_cycle11 | 50
duty_cycle12 | 50
duty_cycle13 | 50
duty_cycle14 | 50
duty_cycle15 | 50
duty_cycle16 | 50
duty_cycle17 | 50
clock_name_0 | outclk0
clock_name_1 | outclk1
clock_name_2 | outclk2
clock_name_3 |
clock_name_4 |
clock_name_5 |
clock_name_6 |
clock_name_7 |
clock_name_8 |
clock_name_global_0 | false
clock_name_global_1 | false
clock_name_global_2 | false
clock_name_global_3 | false
clock_name_global_4 | false
clock_name_global_5 | false
clock_name_global_6 | false
clock_name_global_7 | false
clock_name_global_8 | false
pll_tclk_mux_en | false
pll_tclk_sel | pll_tclk_m_src
pll_vco_freq_band_0 | pll_freq_clk0_disabled
pll_vco_freq_band_1 | pll_freq_clk1_disabled
pll_freqcal_en | true
pll_freqcal_req_flag | true
cal_converge | false
cal_error | cal_clean
pll_cal_done | false
include_iossm | false
cal_code_hex_file | iossm.hex
parameter_table_hex_file | seq_params_sim.hex
iossm_nios_sim_clk_period_ps | 1333
hp_number_of_family_allowable_clocks | 9
hp_previous_num_clocks | 1
hp_actual_vco_frequency_fp | 600.0
hp_parameter_update_message | {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}
hp_qsys_scripting_mode | false
hp_actual_output_clock_frequency_fp0 | 5.0
hp_actual_output_clock_frequency_fp1 | 40.0
hp_actual_output_clock_frequency_fp2 | 320.0
hp_actual_output_clock_frequency_fp3 | 100.0
hp_actual_output_clock_frequency_fp4 | 100.0
hp_actual_output_clock_frequency_fp5 | 100.0
hp_actual_output_clock_frequency_fp6 | 100.0
hp_actual_output_clock_frequency_fp7 | 100.0
hp_actual_output_clock_frequency_fp8 | 100.0
hp_actual_output_clock_frequency_fp9 | 100.0
hp_actual_output_clock_frequency_fp10 | 100.0
hp_actual_output_clock_frequency_fp11 | 100.0
hp_actual_output_clock_frequency_fp12 | 100.0
hp_actual_output_clock_frequency_fp13 | 100.0
hp_actual_output_clock_frequency_fp14 | 100.0
hp_actual_output_clock_frequency_fp15 | 100.0
hp_actual_output_clock_frequency_fp16 | 100.0
hp_actual_output_clock_frequency_fp17 | 100.0
hp_actual_phase_shift_fp0 | 0.0
hp_actual_phase_shift_fp1 | 0.0
hp_actual_phase_shift_fp2 | 0.0
hp_actual_phase_shift_fp3 | 0.0
hp_actual_phase_shift_fp4 | 0.0
hp_actual_phase_shift_fp5 | 0.0
hp_actual_phase_shift_fp6 | 0.0
hp_actual_phase_shift_fp7 | 0.0
hp_actual_phase_shift_fp8 | 0.0
hp_actual_phase_shift_fp9 | 0.0
hp_actual_phase_shift_fp10 | 0.0
hp_actual_phase_shift_fp11 | 0.0
hp_actual_phase_shift_fp12 | 0.0
hp_actual_phase_shift_fp13 | 0.0
hp_actual_phase_shift_fp14 | 0.0
hp_actual_phase_shift_fp15 | 0.0
hp_actual_phase_shift_fp16 | 0.0
hp_actual_phase_shift_fp17 | 0.0
hp_actual_duty_cycle_fp0 | 50.0
hp_actual_duty_cycle_fp1 | 50.0
hp_actual_duty_cycle_fp2 | 50.0
hp_actual_duty_cycle_fp3 | 50.0
hp_actual_duty_cycle_fp4 | 50.0
hp_actual_duty_cycle_fp5 | 50.0
hp_actual_duty_cycle_fp6 | 50.0
hp_actual_duty_cycle_fp7 | 50.0
hp_actual_duty_cycle_fp8 | 50.0
hp_actual_duty_cycle_fp9 | 50.0
hp_actual_duty_cycle_fp10 | 50.0
hp_actual_duty_cycle_fp11 | 50.0
hp_actual_duty_cycle_fp12 | 50.0
hp_actual_duty_cycle_fp13 | 50.0
hp_actual_duty_cycle_fp14 | 50.0
hp_actual_duty_cycle_fp15 | 50.0
hp_actual_duty_cycle_fp16 | 50.0
hp_actual_duty_cycle_fp17 | 50.0
deviceFamily | UNKNOWN
generateLegacySim | false

## Software Assignments (none)

generation took 0.00 seconds | rendering took 0.05 seconds